The present invention relates generally to a method and apparatus for tolerating scheduling latency and achieving time alignment for transmit and receive signals in high-speed modems implemented on host processors.
With host processors in personal computers becoming more and more powerful, it becomes feasible to implement high-speed modems such as asymmetrical digital subscriber line (ADSL) modems in software. Computation complexity or millions-of-instructions-per-second, however, are not the only challenges for a successful implementation of high-speed modems. The digital signal processor (DSP) functions for the high-speed modems require real-time execution, e.g., the DSP function must be executed to generate additional transmit samples to be queued to the transmit (TX) buffer before it becomes empty and the DSP function must be executed to process received samples before the receive (RX) buffer becomes full. The host processor, however, may be running many other tasks concurrently such that its operating system may not be able to guarantee the timely execution of the real-time DSP functions. In other words, the scheduling latency, as defined as the delay of actual execution of the task from the time when the request is generated, is very large. Clearly, if the latency exceeds the amount of time it takes to transmit the remaining samples in the TX buffer, a TX buffer underrun problem will arise. Likewise, if the RX task does not get executed by the time the RX buffer is completely filled, a RX buffer overrun problem will arise.
In addition, the large response time may cause problems for meeting certain requirements. For example, the ADSL standards (G.992.x) require time alignment between upstream and downstream signals, i.e., certain upstream signal must appear at the line at about the same time its corresponding downstream signal is being transmitted by the central site modem. The straightforward approach of starting to send the upstream signal as soon as the corresponding downstream signal is received would fail if the response delay is large.
Thus, there exists a need to provide a method and apparatus that deals with the large response delay caused from the transmit buffer underrun and/or receive buffer overrun, and also resolves its corresponding time alignment problems.